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Theory
1. Decoder In general, decoder is a combinatorial device that has n input ports and m output port...
Theory
1. Multiplexer A multiplexer has multiple input pins, but only has one output pin. This circuit g...
Theory
A. Binary Operation In electrical components, data is represented as a stream of bits. These bits...
Theory
A. Introduction to Sequential Circuits If we have an AND gate and drive both inputs with 1, the o...
Theory
Objective Understand basic digital arithmetic using adders and subtractors. In digital arithme...
Theory
Complex Logic Gates: Theory Introduction Complex logic gates are formed by combining basic logic ...
Loop Control: Next & Exit Statements
The following are two additional statements that can be used to control the looping construct: Ne...
While Loop and For Loop
What is looping in VHDL? A looping construct (looping statement) in VHDL is an instruction that a...
Procedure and Function
Procedure in VHDL In VHDL, a "procedure" is a language construct used to group multiple statement...
Procedure, Function, and Impure Function Synthesis
In VHDL, both "functions" and "procedures" can be used in the description of hardware. However, i...
Code Sample
This example demonstrates a simple FreeRTOS queue communication between two tasks (Task1 and Task...
Module 2: Memory Management & Queue
Memory Management in ESP32 Memory management is a crucial aspect of developing embedded systems, ...
Code Sample
/** * FreeRTOS LED Demo * * One task flashes an LED at a rate specified by a value set in anot...
Module 1: Introduction to RTOS & Task Scheduling
Understanding Real-Time Operating Systems (RTOS) A Real-Time Operating System (RTOS) is a type of...
PlatformIO (Recommended)
About PlatformIO is a versatile, open-source ecosystem designed for embedded development, providi...
External Reference
Check out the external reference by digikey: Deadlock & Multicore
Array and Types in VHDL
Array In VHDL, an array is a collection of elements that have the same data type. You can think o...
VHDL Modularity
We will build a 4-bit Ripple Carry Adder using 4 Full Adders in Structural Style Programming. Eac...
Structural Style, Port Mapping, and Generic Map
Structural Style Programming Structural Style Programming in VHDL allows designers to build digit...
External Reference
Check out the external reference by digikey: Software Timers & Hardware Interrupts