Digital Sistem Design (PSD/DSG)
Module 1 - Setup
For Digital Sistem Design (DSG) or Perancangan Sistem Digital (PSD) Practicum, students must have...
Vivado Installation Tutorial
1.1 Vivado Explanation Vivado is an Integrated Design Environment (IDE) developed by Xilinx (now...
Vivado Simulation and Synthesis Tutorial
1.3 Vivado Tutorial For this tutorial, we will use this code for reference : LIBRARY IEEE; US...
Quartus Prime Installation Tutorial
1.1 Quartus Prime Explanation Intel Quartus Prime is a comprehensive software suite from Intel u...
Quartus Prime Synthesis Tutorial
1.3 Quartus Prime Tutorial For this tutorial, we will use this code for reference : LIBRARY IE...
ModelSim Installation Tutorial
ModelSim Simulation Tutorial
Module 2 - Dataflow Style
Module 3 - Behavioural Style
A behavioral style in VHDL describes a digital system by specifying its functionality using high-...
Understanding Behavioral Style
One of the three architecture models is the behavioral style. Unlike the data-flow style, a VHDL ...
Process Statement
A process statement is a concurrent command that consists of a label, sensitivity list, declarati...
Sequential Statement
In a process, the execution of sequential statements will be initiated when there is a change in ...
Wait Statements
Wait StatementsWait statements are used to make a process wait for a certain condition, signal/va...
Report Statements
In VHDL, the report statement is used to generate text messages during simulation. This statement...
Module 4 - Testbench
1. Understanding Testbench in VHDL
A VHDL testbench is a non-synthesizable VHDL entity used to simulate and verify the functionality...
2. Components of a Testbench
2.1 Entity Declaration The testbench entity is declared without any ports. It's a self-contained ...
3. Testbench Architecture Models
3.1 Testbench for Combinational Circuit There are three architectural models for changing the val...
4. Assert and Report Statement
4.1 Assert Statement The assert statement is used for creating self-checking testbenches. It acts...
5. File I/O in VHDL
In VHDL, we can perform file handling using the TextIO library. This feature is very useful for d...
Extra: Array in VHDL
6.1 Array In VHDL, an array is a collection of elements that share the same data type. You can th...
Module 5 - Structural Programming
1. Structural Programming in VHDL
1.1 Structural Style Structural Style Programming is an approach in VHDL that allows designers to...
2. Generic Map
2.1 Generic Map Explanation A generic map is the process of associating a generic value in an ent...
3. VHDL Modularity
3.1 VHDL Modularity Explanation Example: 4-bit Ripple Carry Adder using 4 Full Adders. A Ripple C...
4. Array and Type
4.1 Array and Type in VHDL 4.1.1 Array An array is a collection of elements of the same data type...
Module 6 - Looping Construct
loop
Introduction to Looping Constructs
Introduction to Looping Constructs Looping constructs are VHDL instructions that allow a program ...
For Loop
For Loop The for loop is the most common type of sequential loop in VHDL. It is used to repeat a ...
While Loop
While Loop The while loop is used where the number of repetitions is not known from the start. A ...
Loop Control - Next & Exit
Loop Control - Next & Exit The two control statements, next and exit, allow you to skip an iterat...
For-Generate Loop
The Concurrent 'for-generate' Loop We now switch from sequential loops to a concurrent one. The f...
When & Which
When & Which? Comparison Feature for Loop while Loop for-generate Statement Execution Sequ...
Module 7 - Procedure, Function, and Impure Function
Procedure
In VHDL, a procedure is a type of language construct used to group several statements and specifi...
Function
In VHDL, a function is a subprogram used to perform calculations or data processing that returns ...
Impure Function
In VHDL, an impure function is a special type of function that is allowed to read or modify signa...
Procedure, Function and Impure Function Synthesis
In VHDL, both "function" and "procedure" can be used in hardware descriptions, but it should be u...
Difference between Procedure, Function and Impure Function
Criteria Procedure Function Impure Function Purpose Perform tasks without returning a valu...
Module 9 - Microprogramming
1. Introduction: The Role of the Control Unit
1.1 Definition: The Control Unit (CU) is the core component of a computer's Central Processing ...
2. The Control Unit Dilemma: Hardwired vs. Microprogrammed
The fundamental problem of generating control signals, introduced in Section 1.0, is solved by tw...
3. Principles of Microprogrammed Control
This section details the core theory of the microprogrammed control unit, the flexible alternativ...
4. The Micro-instruction
If the Control Store is the "recipe book" for the CPU, then a micro-instruction is a single "line...
5. Execution Flow and Sequencing
This section connects all the previous concepts to illustrate how the microprogrammed control uni...